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“Thanks to the UTSOI model from CEA-Leti, STMicroelectronics has developed a complete design platform for SOC including a full set of libraries and its associated design flow. This model is supported in all the major spice simulators from the industry such as HSPICE, ELDO or SPECTRE and can be easily implemented within a conventional design flow as conceived for bulk.”
“This compact model has been clearly developed with the objective to meet the present and future needs of circuit designers, with the capability to accurately reflect the transistor behavior down to 10nm and below on wide ranges of body bias, poly bias and supply voltage. Thanks to this approach, it provides circuit designers a key advantage for digital and analog research as well as technology benchmarking from the early stage of the development of a new node. UTSOI appears the must-have solution for high performance and low power circuit simulations in UTBB FD-SOI.”
The Verilog-A code can also be obtained: please contact us!
The model usage is simplified by its implementation in the major commercial
SPICE simulators through the following EDA providers:
CEA is a French government-funded technological research organisation in four main areas: low-carbon energies, defense and security, information technologies and health technologies. A prominent player in the European Research Area, it is involved in setting up collaborative projects with many partners around the world.